instruction fetching造句
例句與造句
- After all logic events have been completed, the control unit initiates the next instruction fetch .
在所有的邏輯事件完成之后，控制器再次啟動下一步指令的讀取。 - Instruction fetches the address of type
的參數(shù)的地址（類型為 - Reducing pipeline delay using two instruction fetching units
通過兩個取指令部件消除流水線控制相關(guān)延遲 - Correctly implement instruction fetch exceptions , improving compatibility
正確地貫徹教學(xué)賣到例外,改善兼容性 - Instruction fetch module
取指令模塊 - It's difficult to find instruction fetching in a sentence. 用instruction fetching造句挺難的
- Instruction fetch phase
取指令階段 - Instruction fetch cycle
取指令周期 - 14 gabbay f , mendelson a . the effect of instruction fetch bandwidth on value prediction
模擬結(jié)果表明不同值預(yù)測器在不同配置下效果不同。 - Program execution consists of repeating the process of instruction fetch and instruction executing
程序的執(zhí)行即是反復(fù)提取指令和執(zhí)行指令的過程。 - The instruction fetch is a common operation for each instruction , and consists of reading an instruction from a location in memory
取指令對于每個指令來說都是個普通操作，它包括從內(nèi)存單元中讀指令。 - The first policy can gain the higher ipcs than other policies and the second policy can make the use of ifq ( instruction fetch queue ) better than other policies
前者可以獲得比現(xiàn)有線索調(diào)度算法更高的ipc值,而后者可以獲得比現(xiàn)有線索調(diào)度算法更高的ifq ( instructionfetchqueue )利用率。 - In order to make better use of instruction fetch units , we also propose some new strategies , memcount policy and precount policy , base on cache miss rate and branch predict taken rate
該算法在多線索條件下, cache的缺失率相比單線索條件下的random算法與lfu算法而言有較為明顯的降低。 - Another unique architectural feature is the memory system which allows an instruction fetch and at the same time a data access by each individual core at every single clock cycle
另一個獨特的構(gòu)架特性是內(nèi)存系統(tǒng)，它允許一個取指，并在同一時間，每一個核可以讀取數(shù)據(jù)在每一個單獨的時鐘周期內(nèi)。 - The blueprint of instruction fetch unit is presented and its performance is evaluated with theory model and simulation . and the fetch strategy and parameter are optimized based on above evaluation
文中提出了取指部件的設(shè)計原理而且采用理論模型和模擬方法對它進行了性能評價，利用評價結(jié)果優(yōu)化了取指策略和參數(shù)設(shè)置。 - Unless told otherwise , the cpu always increments the pc after each instruction fetch so that it will fetch the next instruction in sequence ( i . e . , the instruction located at the next higher memory address )
如果未指定其他方式， cpu總是在每取一條指令后將pc加一，這樣就可以按順序取下一條指令(就是在高端內(nèi)存地址單元存放的指令) 。
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